Philips Semiconductors has announced that it has broken the 64 KB barrier with the first 8-bit 80C51 to support up to 16 MB of on-chip linear addressable memory. The 87C51Mx2 microcontroller family is the first in a broad line of large on-chip memory microcontrollers based on the company's new 51MX core.
The 51MX combines a significant increase in on-chip program and data memory together with high-level C language performance enhancements. Full binary object code compatibility is maintained, allowing design engineers to re-use existing 80C51 program codes. The architecture also retains 80C51 bus compatibility to allow re-use of existing peripherals and application specific integrated circuits (ASICs).
"Philips Semiconductors' 51MX family represents the future for the 80C51 architecture," says Geoff Lees, Director of Marketing, Microcontroller Business Line, Philips Semiconductors. "The 51MX is a unique embedded memory solution that creates a roadmap to greater functionality and increased performance, eliminating the need for software paging and costly external code-banking hardware."
The 51MX is an accelerated 80C51 architecture that executes instructions at twice the rate of standard 80C51 devices. Its 23 bit linear address supports up to 16 MB of on-chip or off-chip program and data memory.
The program counter is extended to 23 bits, and the stack pointer to 16 bits. A new 23 bit extended data pointer, together with two 24 bit universal pointers using existing general purpose registers, creates a 16 MB linear address range optimised for C compilers.
The 87C51MC2 is now available with 96 KB of OTP (one-time programmable) memory and 3 KB of RAM and the 87C51MB2 with 64 KB of OTP and 2 KB of RAM. Both devices operate with supply voltages from 2,7 V to 5,5 V and run at up to 24 MHz (5 V) with a typical instruction cycle time of 250 ns. The 87C51Mx2 family includes an integrated PCA (programmable counter array), two full-duplex enhanced UARTS, an industry-standard serial peripheral interface and a configurable watchdog timer.
Ultra-low power MEMS accelerometer Altron Arrow
Analogue, Mixed Signal, LSI
Analog Devices’ ADXL366 is an ultra-low power, 3-axis MEMS accelerometer that consumes only 0,96 µA at a 100 Hz output data rate and 191 nA when in motion-triggered wake-up mode.
Read more...ESP32-C6 achieves PSA-L2 iCorp Technologies
DSP, Micros & Memory
Espressif Systems recently announced that its ESP32-C6 microcontroller has achieved PSA Certified Level 2 (PSA-L2) security certification, making it the first RISC-V-based MCU to reach this level.
Read more...Microprocessor with integrated NPU Avnet Silica
DSP, Micros & Memory
The RZ/G3E from Renesas is a microprocessor integrated with quad CPU and NPU in one chip, improving power efficiency, reliability, and security.
Read more...Dual-core support in NECTO Studio
DSP, Micros & Memory
MIKROE recently announced that version 7.3.0 of its NECTO Studio Integrated Development Environment now supports dual-core MCUs, allowing designers to program and debug each core independently.
Read more...Post Quantum Cryptographic firmware library
DSP, Micros & Memory
The STM32 post-quantum cryptographic library enables developers to satisfy application requirements for any combination of data integrity, confidentiality, identification/authentication, and nonrepudiation.
Read more...Converting high voltages without a transformer Altron Arrow
Editor's Choice Power Electronics / Power Management
With appropriate power converter ICs, such as the LTC7897 from Analog Devices, many applications can be suitably powered without having to use complex and cost-intensive transformers.
Read more...MultiVolt series of oscillators Future Electronics
DSP, Micros & Memory
The ECS-3225MVQ from ECS Inc. is a compact, quartz-based MultiVolt oscillator designed for precision timing in automotive, industrial, and portable electronic systems.
Read more...Drive innovation with AURIX TriCore MCUs Future Electronics
DSP, Micros & Memory
Infineon’s AURIX TriCore family balances safety, performance, and energy efficiency to offer a scalable and future-ready portfolio.
While every effort has been made to ensure the accuracy of the information contained herein, the publisher and its agents cannot be held responsible for any errors contained, or any loss incurred as a result. Articles published do not necessarily reflect the views of the publishers. The editor reserves the right to alter or cut copy. Articles submitted are deemed to have been cleared for publication. Advertisements and company contact details are published as provided by the advertiser. Technews Publishing (Pty) Ltd cannot be held responsible for the accuracy or veracity of supplied material.
printer friendly version