As evolutionary enhancements to the venerable VMEbus, both VXS and VPX deliver significant improvements in data bandwidth, connectivity, power distribution and cooling. When VME was first introduced, its shared bus backplane inter-board transfer rates of 30 or 40 MBps was more than adequate for most applications.
As requirements grew, VME acquired new interfaces such as VSB, RACEway, RACE++, VME64, VME320 and 2eSST, thereby ensuring a healthy community of suppliers and a new stream of products.
Well into its third decade of widespread deployment, VME adopted the new VXS Gigabit serial interface, clearly representing the most significant leap in backplane data transfer rates throughout its entire history. Because VXS delivered such a dramatic improvement in embedded system performance, the use of Gigabit serial technology was extended to create VPX. The OpenVPX initiative followed shortly thereafter as risk-averse government agencies, with concerns about the longevity and maintainability of new technology and architecture, mandated the need for industry-wide standards. The hallmark of any successful standard is that it continues to evolve with technology, and none offers a better example than VME’s evolution to VXS and VPX.
VXS: High-bandwidth fabric for VME
Motorola’s VME Renaissance announcement in 2003 unveiled the new VXS initiative, officially designated VITA 41 by the VSO (VITA Standards Organisation). It defines the implementation of Gigabit serial technology for VME in a logically layered specification, while carefully preserving the legacy VME form factors and bus operations.
At the top layer, VITA 41 defines the connectors, pin designations, dimensions and mechanical structures for cards and backplanes – completely free of any mandates for specific slot interconnection strategies, protocols or fabrics.
VXS defines two types of cards: the Payload Card and the Switch Card. Both utilise the same mechanical outline as a standard 6U VME card.
The payload card fits a new Gigabit serial connector (MultiGig RT2) between the existing P1 and P2 connectors, designated as P0. Most legacy VME backplanes provide clearance for the new P0 connector, thus allowing insertion of VXS cards for backwards compatibility even though the VXS interface is not engaged.
VXS backplanes have one mating MultiGig RT2 connector for each payload card slot. VITA 41 does not dictate any specific backplane topology and leaves plenty of flexibility for various architectures.
The simplest configuration is the VXS switchless mesh backplane shown in Figure 1. Here, three VXS cards are joined in a ring configuration, with each card connected to the other two through two 4X links hardwired in copper as part of the backplane design. At a serial bit rate of 3,125 GHz, this system supports simultaneous data transfers among the three cards in both directions at an aggregate inter-board rate of 7,5 GBps.
VPX extensions: Tremendous switched-fabric I/O capacity
With each new generation of powerful, high-performance embedded solutions – including processors with higher clock rates and wider buses; data converter products with higher sampling rates; and FPGAs, RISCs and DSPs offering incredible computational rates – an equally capable backplane solution was needed to keep pace with the data transfer rates and prevent system bottlenecks. By extending the use of Gigabit serial links already proven under VXS, the embedded community created the VPX initiative, which was formally defined under VITA 46. As a migration from the earlier VME and VXS standards, VPX shares the same outline as 3U and 6U cards and supports XMC mezzanine modules defined under the VITA 42 standard.
While VXS allows only one MultiGig RTS connector on a 6U card, VPX extends that number to three for a 3U card and to seven for a 6U card. As a result, VPX payload cards support a much higher traffic bandwidth than VXS, with 8 to 24 Gigabit serial 4X ports compared to only two with VXS.
Like the VXS specification, the VITA 46.0 VPX base specification does not define backplane topologies or specific Gigabit serial fabrics or protocols. As with VXS, implementations of each fabric protocol are defined as sub specifications, or ‘dot specs.’ As industry started using VPX, a new extension emerged to deal with severe environmental requirements. The VITA 48 REDI (ruggedised enhanced design implementation) defines specific mechanical designs for enhanced thermal management using forced air, conduction cooling and liquid cooling methods. It also defines protective metal covers for the cards to satisfy new requirements for simplified field servicing in deployed military applications.
OpenVPX
The OpenVPX organisation was formed in January 2009 to promote industry-wide standards and long-term availability of VPX technology across the industry. The original VPX specification was being used, but because it permitted such a wide range of architectures, VPX systems tended to be unique, vendor-specific implementations.
The mission of OpenVPX was to enhance the original VPX standard by adding a set of well-defined system architectures, nomenclature and conventions to enable interoperability among vendors. Consisting of key vendors in the embedded system community, all eager to convince government and military customers that VPX was suitable for current and future systems, the group made fast progress and turned over the completed specification to the VSO in October 2009 for standardisation under VITA 65. In February 2010, the specification was ratified by VSO, while ANSI approval is expected sometime later this year.
This article will be continued in a future issue of Dataweek.
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