Recently unveiled by Analog Devices is a PLL (phase-locked loop) synthesiser for wireless communication systems. The ADF4351 allows implementation of fractional-N or integer-N operation continuously over a frequency range of 35 MHz to 4400 MHz while maintaining low phase noise. It incorporates a high-performance, on-chip VCO (voltage-controlled oscillator) and supports dual output ports.
The PLL features programmable divide-by-1/2/4/8/16/32/64 circuits which allow the user to generate an RF output frequency anywhere between 35 MHz and 4400 MHz. This means that engineers need not design multiple synthesisers for different bands. For applications that require isolation, the RF output stage can be muted. The mute function is both pin- and software-controllable. Furthermore, control of all of the on-chip registers is through a simple 3-wire interface. The ADF4351 operates with a power supply ranging from 3,0 V to 3,6 V and can be powered down when not in use.
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