Well known for its microcontroller offering, Renesas Electronics also manufactures an extensive lineup of memory products to meet the diverse functional requirements of its customers, covering not only low-power SRAM, but also QDRII, QDRII+, DDRII & DDRII+ high-speed SRAM and a wide range of serial/parallel EEPROM. The company’s offering of low-power SRAM ranges from 256 Kbit up to 64 Mbit densities in the same package.
Renesas’ in-house Core Advanced Technology, based on unique TFT and capacitor stacked technology, delivers high reliability, small die size, and latch-up free and soft-error free results.
Many SRAM competitors make use of a 90 nm, full CMOS memory cell process. A full CMOS cell uses six transistors per memory cell, and data is stored by a small capacitor. The charge in the small capacitor can easily and unintentionally be influenced by alpha particles which can lead to incorrect storage content. The memory cell is built from P-channel and N-channel MOSFETs and due to the narrow distance of P and N channels, the latch-up phenomenon can occur.
Renesas, however, makes use of a 150 nm, TFT plus capacitor memory cell process. The advanced cell, with separate capacitors on top of the transistors, stores a significantly larger amount of charge. This solution leads to high robustness against alpha particles and results in a very low soft error rate. The memory cell is built from stacked thin-film P- and N-channel MOSFETs, which avoids latch-up.
According to Renesas, the soft error rate of its 16 Mbit SRAM has been tested and confirmed to be less than 49 FIT/device (failures in time) compared to competitors’ technology at 9382 FIT/ device.
The 8-bit survival syndrome – Part 2
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