20 May 2015DSP, Micros & Memory
Analogue, Mixed Signal, LSI
In markets that require high-speed data generation and acquisition, performance is key. To make it easier to get a direct connection to the analog-to-digital converter (ADC)/digital-to-analog converter (DAC) and analog front end (AFE), Texas Instruments developed a highly integrated system-on-chip integrating support for the JESD204B interface standard.
The KeyStone-based 66AK2L06 incorporates digital signal processing (DSP) programmability and pre-validation of multiple high-speed ADCs, DACs and AFEs. The chip’s integration of a digital front end (DFE)/digital down-converter/up-converter (DDUC) and JESD204B interface can deliver reductions in system cost and power. This system-level solution is further supported by the Multicore Software Development Kit (MCSDK) and RF Software Development Kit (RFSDK).
The four onboard TMS320C66x DSP cores, each delivering up to 1,2 GHz of signal processing, allow customers flexibility in programming via floating point. In order to perform complex control code processing, dual ARM Cortex-A15 MPCore processors deliver up to 1,2 GHz of processing power and enable real-time direct access to I/Os with low latency.
The Fast Fourier Transform Coprocessor (FFTC) module is accessible across all the DSP cores to accelerate the FFT and IFFT computations that are required in applications such as radar systems. Additionally, the network coprocessor – a hardware accelerator that processes data packets with a main focus on Ethernet – has four gigabit Ethernet (GbE) modules to send and receive packets from an IEEE 802.3 compliant network, as well as a packet accelerator to perform packet classification operations such as header matching, and packet modification operations and a security accelerator to encrypt and decrypt data packets.
With the 66AK2L06, developers have the ability to change DFE configurations on the fly after deployment through software, while storing multiple configurations in DDR or Flash memory with the ability to switch dynamically. The integration of the DFE and JESD204B interface allows users to change filters to make optimisations through software programmability faster than with an FPGA-based solution.
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