Memory architecture delivers ultra-high density flash products without compromise

21 November 2001 Electronics Technology

AMD announced in May 2001 its breakthrough in memory cell architecture that enables a flash memory product to hold twice as much data as standard flash, without compromising device endurance, performance or reliability. The first product featuring AMD's new mirror bit architecture is designed to offer a low cost, highly reliable solution that is pin-compatible with today's standard three-volt (low voltage - LV). This allows customers to get the benefits of the mirror bit architecture without changing their system design.

Mirror bit architecture delivers the low cost structure of a multi-level cell (MLC) solution without any of the drawbacks of MLC, claims AMD. The mirror bit architecture's ability to store two bits of data in one cell, without compromising data integrity, is achieved by dividing each standard cell into two discrete and independent units where the data is stored in physically distinct locations.

AMD's planned family of mirror bit products include products from 64 Mb through 1 Gb. This product family will include two new performance-enhancing features designed to remove the data input and output bottlenecks inherent to ultra high-density devices.

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