Alliance Memory introduced a new line of high-speed CMOS mobile low-power DDR2 (LPDDR2) SDRAMs with densities of 1 Gb, 2 Gb and 4 Gb in a 134-ball FBGA package. The devices offer a variety of power-saving features, including 1,2 V/1,8 V operating voltages, to extend battery life in portable electronics, while their high density enables ultra-slim designs.
The chips provide reliable drop-in, pin-to-pin compatible replacements for a number of similar solutions in ultra-low-voltage cores and I/O power supplies for mobile devices such as smartphones and tablets. For these products, the ICs feature auto temperature-compensated self-refresh (TCSR) to minimise power consumption at lower ambient temperatures. In addition, their partial-array self-refresh (PASR) feature reduces power by only refreshing critical data, while a deep power down (DPD) mode provides an ultra-low power state when data retention isn’t required.
Featuring a double data rate four-bit prefetch architecture, the LPDDR2 SDRAMs deliver high-speed operation with clock rates of 400 MHz and 533 MHz, and are available in commercial (-30°C to +85°C) and industrial (-40°C to +85°C) temperature ranges. The devices offer programmable read or write burst lengths of 4, 8 or 16; an auto pre-charge function provides a self-timed row pre-charge initiated at the end of the burst sequence. Easy-to-use refresh functions include auto- or self-refresh.
The 8-bit survival syndrome – Part 2
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Just like the 4-bit pre-microcontroller, the 8-bit MCU has been finding ways to stick around. Their features and speeds have been improving, offering competitive reasons to work with them.
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