STMicroelectronics has introduced a family of Flash memories targeted at the industry standard LPC (low pin count) bus interface used in certain computer motherboard architectures.
The LPC family includes the 2 Mbit M50LPW002, the 4 Mbit M50LPW040 and the 8 Mbit M50LPW080. The main application of these devices is to store system and video BIOS code. This family supplements ST's Firmware hub flash memories (and ISA bus compatible Flash memories). ST now offers a complete range of Flash memories for BIOS storage compatible with all the industry standard chipsets including those manufactured by AMD, VIA, SiS, Ali and Nvidia.
The LPC family devices operate from a 3,0-3,6 V supply for program, erase and read operations. An optional 12 V supply is available to speed up programming. The maximum active current is 20 mA and the maximum standby current 100 µA.
The devices have a program/erase controller with an embedded byte program/erase algorithm and a program/erase suspend feature that allows a program or erase operation to be suspended to allow read operations in other blocks. A quadruple byte programming option is available to speed up programming in a manufacturing environment. The typical programming time is 10 µs per byte and the typical block erase time 750 ms for a 64 KB block.
The LPC devices feature both hardware and software block protections that are provided by write protect pins and lock registers which define the individual block protection status.
All the functions are available via the LPC interface. An optional address/address multiplexed protocol allows faster programming on the customer's production line. The devices are guaranteed for a minimum of 20 years data retention and are available in a 32-pin PLCC package.
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