Many technologists seem to agree on one thing: innovation has never been faster. Why?
AI. The race is on to offer differentiated hardware solutions for optimised AI performance at the edge and in the data centre.
Data scientists, AI system architects, IC designers, optical engineers, interconnect providers like Samtec, and other solutions providers, are rethinking system topologies. GPU clustering, disaggregated computing, cache-coherent memory, optical interconnects, and 200 Gbps channels are among the solutions defining AI system architectures.
Given those realities, several system architects ponder if PCIe 7.0 technology 128 GT/s raw bit rate is fast enough.
That seems fair, given GPU-to-GPU and GPU-to-CPU bridging protocols reach beyond 200 Gbps already. Many wonder if PCIe 7.0 can keep up as an alternative to GPU-to-XPU interconnects.
But is that a fair a question to ask?
Frankly, equating PCIe 7.0 technology with GPU-to-XPU interconnects is not an apples with apples comparison. Think about the use
cases.
PCI Express (and its predecessor PCI) have historically linked x86 CPUs with a multitude of I/Os in general compute applications – desktops, laptops, workstation, servers and more. Examples of general compute I/Os may include graphics cards, storage devices, network adaptors, or even AI accelerators.
PCI-SIG, the consortium that owns and manages PCI specifications as open industry standards, consistently works with member companies to double PCIe specification performance every three years. With the planned delivery of the PCIe 7.0 spec in 2025, they are right on schedule.
GPU-to-XPU interconnects were designed to enable high-speed, point-to-point GPU-to-GPU communications. In the earliest versions of accelerated computing, system architectures may have included one GPU for every CPU. Oversimplified, this is a 1 CPU:1 GPU architecture.
As AI models have grown, a 1 CPU:n GPU architectures have quickly emerged. With LLMs and other models having trillions of parameters, thousands of GPUs need to be ‘clustered’ to handle the necessary parallel computing. Faster and faster GPU-to-XPU interconnects have been the result. 200 Gbps GPU-to-XPU interconnects are currently the standard.
So, what’s the end result? Is PCIe 7.0 technology too fast or is it DOA? It depends on who you ask. In this writer’s opinion, PCIe 7.0 technology will complement GPU-to-XPU interconnects for the I/O use cases transferable between general compute, accelerated compute, and ever-evolving AI system topologies.
The short answer is PCIe 7.0-capable technology is real and ready for prototype implementation. Recently, at ECOC and again at OCP, Alphawave Semi and Samtec demonstrated 128 Gbps PAM4 system interoperability. The setup combined Alphawave Semi’s IP with Samtec’s high-performance interconnects.
The Alphawave Semi PipeCORE PCI-Express PHY transmits 128 GT/s data to a 2,5+ metre transmission line consisting of various Samtec high-performance interconnect systems. Despite the 2,5+ metre overall length and eight connection points, the system still achieves an excellent pre-FEC BER of e-10 or better.
So, is PCIe 7.0 technology coming too soon? Is it fast enough? I believe that PCIe 7.0 technology is the right solution for the right time.
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