The new imperatives of the intelligent edge – power efficiency, security and reliability – are forcing system architects and design engineers to find new solutions. For the growing number of system designers switching to PolarFire FPGAs and SoCs, Microchip has announced new development resources and design services to aid the move. These include the industry’s first mid-range industrial edge stack, ready-to-customise cryptography and boot libraries, and new tools to convert existing FPGA designs to PolarFire devices.
The additions expand Microchip FPGA’s comprehensive suite of tools and services supporting the PolarFire family of devices, and includes the only RISC-V SoC FPGA shipping in volume production.
“The intelligent edge demands the very best in power efficiency, security, safety and reliability,” said Shakeel Peera, vice president of strategy for Microchip FPGA. “Our new mid-range industrial edge stack and related tools offer more than just automation IP, as they enable secure edge compute, analytics, machine learning and high-availability data interconnects for Industrial IoT end points.”
“Customers are switching to PolarFire FPGAs and SoCs because they can create products that weren’t possible before, establish clear product differentiation, and accelerate their time to innovation,” said Bruce Weyer, corporate vice president of Microchip FPGA. “Our mid-range technology leadership and unmatched RISC-V-based compute solutions offer system architects unprecedented design flexibility and efficiency.”
To back its FPGA-based embedded processor portfolio, Microchip offers broad RISC-V development support with more than 60 companies.
The new resources that promise to offer immediate benefits at the design and development stage include:
• A comprehensive industrial edge stack for Open Platform Communications/Unified Architecture (OPC/UA)-based IIoT applications.
• Cryptography and boot soft IP libraries that can be fully customised. They join more than
200 proven, optimised and easy-to-use processor soft cores and other Microchip FPGA IP elements and more than 120 third-party cores. Each library element is optimised for the best area and timing with PolarFire FPGAs and SoCs for fast designs and prototypes.
• A high-performance AI/ML development flow that lets algorithm creators build their own mid-range FPGAs. This solution features SmartHLS compiler software, the VectorBlox accelerator software development kit (SDK) and neural-network IP.
Power efficient mid-range FPGA ASIC Design Services
The new imperatives of the intelligent edge – power efficiency, security and reliability – are forcing system architects and design engineers to find new solutions. For the growing number of system designers ...
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