Programmable Logic


Low-density FPGAs

23 October 2013 Programmable Logic

Lattice Semiconductor announced its ultra-low-density MachXO3 FPGA family, said to be the world’s smallest, lowest-cost-per-I/O programmable platform aimed at expanding system capabilities and bridging emerging connectivity interfaces using both parallel and serial I/O. By matching advanced, small-footprint packaging with on-chip resources, MachXO3 simplifies the implementation of emerging connectivity interfaces such as MIPI, PCIe and GbE. The 640-to-22 K logic-cell family delivers tiny 2,5 x 2,5 mm WL-CSP packaging and 540 I/O count devices, as well as devices with 3,125 Gbps SERDES capabilities to cover the full spectrum of bridging and interface requirements in consumer, industrial, communications, automotive and compute markets.



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