Programmable Logic


Lattice expands MachXO3 FPGA family

18 May 2016 Programmable Logic

Lattice Semiconductor announced the expansion of its award-winning MachXO3 family of FPGAs with the addition of the MachXO3L-9400 and MachXO3LF-9400 devices available in multiple packages.

Built in response to customer demand, the new devices bring expanded I/O and logic support for control PLD applications, while increased on-chip memory improves picture clarity for low-cost video bridging in large monitor applications.

The MachXO3 family targets the server, communications, industrial and display markets, and the newly enhanced features make it ideally suited for implementing control path functions. The devices provide a glue-less 1 V I/O interface for out-of-band communication with new, leading-edge processors, while hitless I/O enables in-system hardware upgrade along with a switchover from its old configuration to the newly programmed configuration without interrupting the circuit board operation – a feature that is mandatory in high-volume systems.

Other features include a password protection feature that makes the system more robust against malicious erase commands; SED/SEC/SEI feature which enables recovery from a soft error event in milliseconds; simple addition of analog I/Os; and fast 900 Mbps operating speeds supported by MachXO3-9400 FPGA’s I/Os ensures that even high-resolution video streams operate smoothly.

For more information contact Marian Ledgerwood, Future Electronics, +27 (0)21 421 8292, marian.ledgerwood@futureelectronics.com, www.futureelectronics.com



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