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ISP Flash configuration for ARM-based FPGAs
9 November 2016, Programmable Logic

XJTAG has extended the capability of its high-speed in-system programming (ISP) technology, XJFlash. The solution effectively brings the benefits of XJFlash to memory devices connected to the processor subsystem of dual ARM-Cortex-A9 based FPGAs.

According to XJTAG, new and existing customers will experience programming times as much as 20 times faster than existing solutions when configuring memory attached to the processor subsystems of the industry’s leading FPGA SoCs, such as Xilinx Zynq and Altera Cyclone V SoCs, which feature dual ARM Cortex-A9 processors.

The use of FPGAs with integrated processor subsystems is increasing. While these subsystems are fully integrated into the FPGA fabric, they feature their own dedicated, external non-volatile program memory, connected to the physical pins of the FPGA. Configuring these memories in both development and production environments is normally a slow and often complex process. With XJFlash these memories can now be configured simply and at high speed through the JTAG port of the FPGA, without the need for any additional PCB connections.

With this latest development, XJFlash is now able to access and configure memory devices connected to a wider range of FPGAs. Support for the ARM Cortex-A9 based SoCs extends to partial reconfiguration and optimised erase, delivering further productivity benefits. This enables memory devices to be partially erased and reconfigured without having to reprogram the entire device, and also minimises the erase time when regions of a device are already blank.

XJFlash forms part of XJTAG’s portfolio of powerful JTAG tools. As well as needing no additional programming hardware, it claims faster configuration cycles than other programming technologies, for all types of non-volatile memory, including SPI, QSPI and parallel NOR Flash. XJFlash can be used wherever XJTAG can – as part of a standalone XJTAG test system , or fully integrated into third-party test executives (such as LabVIEW) in systems which also use other automated test equipment (ATE).

Existing licensees will automatically benefit from the expanded capabilities of XJFlash. New customers can contact XJTAG or one of its distribution partners for a demonstration. Initial support for FPGA/processor platforms includes Xilinx Zynq-7000 SoCs and Altera Cyclone V SoC devices.


Credit(s)
Supplied By: ASIC Design Services
Tel: +27 11 315 8316
Fax: +27 11 315 1711
Email: info@asic.co.za
www: www.asic.co.za
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Further reading:

  • RISC-V based FPGA architecture
    30 January 2019, Altron Arrow, Programmable Logic
    Microchip, via its Microsemi Corporation subsidiary, announced an extension to its Mi-V ecosystem by unveiling the architecture for a new class of SoC FPGAs at the RISC-V Summit during December 2018. ...
  • RFSoC architecture by Xilinx
    14 November 2018, Avnet South Africa, Telecoms, Datacoms, Wireless, IoT, Programmable Logic
    Xilinx rolled out its Zynq UltraScale+ RFSoC family, an architecture integrating the RF signal chain into a system-on-chip (SoC) for high-performance RF applications. Based on the 16 nm UltraScale+ ...
  • RISC-V based FPGA architecture
    14 November 2018, Altron Arrow, Programmable Logic
    Microchip, via its Microsemi Corporation subsidiary, announced an extension to its Mi-V ecosystem by unveiling the architecture for a new class of SoC FPGAs at the RISC-V Summit during December 2018. ...
  • Thermal design incorporating EDA and MDA design flows
    13 June 2018, ASIC Design Services, Design Automation
    Electronics cooling design and simulation applications have to be quick, reliable and integrated into a fast-moving, complex design process.
  • DFT assistant for Mentor Xpedition
    13 June 2018, ASIC Design Services, Test & Measurement
    Developed by XJTAG, the free XJTAG DFT Assistant for the Mentor Xpedition Designer product increase the design for test (DFT) and debug capabilities of the schematic capture and PCB design environment. ...
  • Embedded deep learning framework for FPGAs
    18 April 2018, ASIC Design Services, This Week's Editor's Pick, Programmable Logic
    ASIC Design Services has developed a scalable and flexible embedded deep learning solution that allows for the implementation of a wide range of convolutional neural networks on FPGAs.
  • PolarFire FPGAs from Microsemi
    15 November 2017, ASIC Design Services, Electronics Technology
    Microsemi unveiled the cost-optimised PolarFire field programmable gate array (FPGA) product family, delivering what the firm claimed as the industry’s lowest power at mid-range densities with 12,7 ...
  • XJTAG updates boundary scan software
    11 October 2017, ASIC Design Services, Test & Measurement, Design Automation
    XJTAG has launched a major update to its flagship software, XJDeveloper. XJTAG’s unified test and programming IDE, XJDeveloper, is a development and debug environment that makes it quick and easy to set ...
  • IDE supporting RISC-V instruction set architecture
    19 July 2017, ASIC Design Services, Design Automation
    Microsemi announced the release of its SoftConsole version 5.1, the world’s first available Windows-hosted Eclipse integrated development environment (IDE) for designs utilising RISC-V open instruction ...
  • Electronic Product Creation Seminars
    19 July 2017, ASIC Design Services, News
    Electronic Product Creation Seminars    14 August 2017 – Stellenbosch    16 August 2017 - Durban    17 August 2017 – Midrand ASIC Design Services, in conjunction with Mentor, a Siemens Business, XJTAG and ...
  • Xilinx SoCs get RF-class analog
    19 April 2017, Avnet South Africa, Programmable Logic
    Xilinx is claiming a disruptive integration and architectural breakthrough for 5G wireless with the infusion of RF-class analog technology into its 16 nm All Programmable MPSoCs. The company says its ...
  • DFT tool for Mentor Graphics PADS
    19 April 2017, ASIC Design Services, Design Automation
    Developed by XJTAG, the free DFT Assistant software for Mentor Graphics’ PADS platform increases the design for test (DFT) and debug capabilities of the schematic capture and PCB design environment. Printed ...

 
 
         
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