Programmable Logic


Microsemi unveils PolarFire FPGA

22 March 2017 Programmable Logic

Microsemi unveiled the new cost-optimised PolarFire field programmable gate array (FPGA) product family, delivering what the firm claims is the industry’s lowest power at mid-range densities with 12,7 Gbps serialiser/deserialiser (SerDes) transceivers as well as best-in-class security and reliability. The FPGA product family is ideal for a wide range of applications within wireline access networks and cellular infrastructure, defence and commercial aviation markets, as well as Industry 4.0 which includes the industrial automation and Internet of Things (IoT) markets.

Today’s cellular infrastructure and wireline access networks are facing a rapid transformation, having to deliver terabytes of high-value content to consumers while reducing operational and capital expenditure, as well as reducing their thermal and carbon footprints. PolarFire FPGAs provide cost-effective bandwidth processing capabilities for the increasing number of converged 10 Gpbs ports with a low power footprint. They also address the market’s growing concerns over tangible cyber security threats as well as reliability concerns that face deep submicron SRAM-based FPGAs as they relate to single event upsets (SEUs) in their configuration memory.

In collaboration with Silicon Creations, Microsemi has developed a 12,7 Gbps transceiver that consumes less than 90 mW at 10 Gbps. The devices boast low device static power of 34 mW at 100K logic elements (LEs), zero inrush current and unique Flash*Freeze mode for standby power of 15 mW at 25°C. Microsemi also provides customers with a power estimator to analyse power consumption of their designs. After implementation, the SmartPower Analyser can be used to access full design power.

PolarFire also provides inherent immunity to configuration SEUs. Additional features to aid with reliability include built-in single error correction and double error detection (SECDED) as well as memory interleaving on large static random access memory (LSRAMs), and system controller suspend mode for safety-critical designs.

Leveraging Microsemi’s expertise in security, the new FPGAs offer Cryptography Research Incorporated (CRI) patented differential power analysis (DPA) bitstream protection, integrated physically unclonable function (PUF), 56 KB of secure embedded non-volatile memory (eNVM), built-in tamper detectors and countermeasures, true random number generators, integrated Athena TeraFire EXP5200B Crypto Co-processors (Suite B capable) and a CRI DPA counter-measures pass-through licence.

The Libero SoC Design Suite offers comprehensive, easy to learn, easy to adopt development tools for designing with PolarFire FPGAs. The suite includes a complete design flow with Synopsys Synplify Pro synthesis and Mentor Graphics ModelSim Pro mixed-language simulation with advanced constraints management, and Microsemi’s differentiated FPGA debugging suite, SmartDebug. Popular IP solutions for 1G Ethernet, 10G Ethernet, JESD204B, DDR memory interfaces, AXI4 interconnect IPs and others are available for use with PolarFire devices.



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