Telecoms, Datacoms, Wireless, IoT


Broadband quadrature demodulator RF IC and dual ADC applications

21 May 2003 Telecoms, Datacoms, Wireless, IoT

The need to increase channel capacities and improve quality of service while reducing system costs is driving communications designers to explore alternative radio architectures. A direct receiver solution can eliminate the need for multiple IF stages and reduce the component count, cost, power, board space, and complexity of a receiver. But until now, the RF IC technology needed for this just has not been available.

Demodulator IC

Analog Devices now offers a single-chip, broadband quadrature demodulator IC which, when combined with a high performance dual ADC, forms a complete direct receiver. The AD8347 can accept an 800 MHz to 2,7 GHz RF input and downconverts it directly to its baseband I and Q (in-phase and quadrature) components, which are then digitised by a dual high speed ADC. Direct downconversion eliminates the need for additional IF stages, saving board space, reducing system complexity, and improving performance.

The AD8347 device integrates on-chip RF and baseband programmable gain stages, which provide 65 dB of 'linear-in-dB' gain control, to ease the design of complex wide dynamic range receivers. With a 65 dB gain control range, a 50 MHz demodulation bandwidth, and excellent amplitude and phase balance, the AD8347 provides an economical direct conversion solution for wireless local loop, broadband access equipment, and microwave radio links. In addition, the device integrates a buffered local oscillator (LO) driver requiring a drive level of only -10 dBm, baseband level detectors, DC offset nulling, and dual differential output amplifiers with adjustable DC common-mode levels, to directly drive a wide range of dual-channel ADCs such as the AD9218. The AD8347 is fabricated on an advanced bipolar process, operating on a single 3 V or 5 V supply, and is available in a 28-lead TSSOP package that saves space further.

Dual ADC

The AD9218 is the industry's first 3 V, 10-bit, 105 MSPS dual ADC. Because of its 300 MHz input bandwidth and 275 mW per channel power consumption, the AD9218 is well suited for direct conversion applications in I and Q communications applications. It delivers SNR performance of 57 dB @ 41 MHz, and features an on-chip reference and track-and-holds. The AD9218 is packaged in 48-lead LQFP and operates over the extended industrial temperature range of -40 to +85°C.

Key features

AD8347:

* 800 MHz to 2,7 GHz RF input range.

* Integrated on-chip 70 dB linear in gain control AGC.

* Quadrature phase accuracy, 1°C.

* I/Q amplitude balance, 0,3 dB.

* Third-order intercept IIP3, +12 dB (min gain).

* Noise figure, 11 dB (max gain).

* Low LO drive, -8 dB.

* Single-supply 2,7 V to 5,5 V.

AD9218:

* Dual 10-bit, 40, 65, 80, and 105 MSPS ADC.

* 300 MHz analog bandwidth each channel.

* SNR = 56 dB @ 41 MHz.

* 1 V p-p or 2 V p-p analog input range each channel.

Together, the AD8347 and the AD9218 form one of the most advanced, yet least complex, direct receiver solutions on the market. Direct conversion enables simpler, smaller, and lower cost receiver implementations within cellular base stations, wireless local loop, point-to-point and point-to-multipoint broadband access equipment, RF instrumentation, satellite modems, and other emerging communications applications.

For more information contact Parsec, 012 349 2282.





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