DSP, Micros & Memory


New DSP offers boosts in performance and I/O bandwidth

29 June 2005 DSP, Micros & Memory Infrastructure

Texas Instruments has revealed its new digital signal processor (DSP) which, compared to its predecessors, offers improved performance, reduced code size plus more on-chip memory and high bandwidth integrated peripherals including the Serial RapidIO bus for inter-processor communications. The TMS320C6455 DSP allows developers of telecom, network and video infrastructure end-equipment and high-end imaging systems to see a system performance gain due to 2x -12x boosts in performance and I/O bandwidth, claims TI.

The new C6455 DSP is fully code-compatible with previous TMS320C64x devices and incorporates Serial RapidIO and other new high bandwidth peripherals. New peripherals and features of this chip, as compared to previous 1 GHz C64x DSPs, include:

* Serial RapidIO, featuring up to 25 Gbps interconnectivity, enabling high performance multiprocessing that is 12 times faster than previous external memory interfaces.

* Gigabit Ethernet MAC (memory access controller) offering 10 times more Ethernet bandwidth than previous C64x devices.

* DDR2 (double data rate) external memory interface delivering twice the throughput of currently available devices.

* 66 MHz PCI (peripheral component interconnect) bus interface providing twice the frequency of previous processors.

* 2 MBytes of L2 memory giving OEMs twice the amount of memory as previous C64x devices.

Based on TI's advanced 90-nanometer CMOS technology, the TMS320C6455 DSP will be offered in 1 GHz, 850 MHz and 720 MHz versions in a 697-pin 24 x 24 mm BGA package.

For more information contact Rodney Farrow, Arrow Altech Distribution, +27 (0)11 923 9600, rfarrow@arrow.altech.co.za



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