High resolution PLL for wireless applications

28 November 2007 Telecoms, Datacoms, Wireless, IoT

Analog Devices has announced the ADF4157, a new high frequency, fractional-N PLL synthesiser for applications that require low phase noise and ultra-fine-tuning resolution, such as satellite communications, private mobile radios (PMR), instrumentation and wireless base station equipment, including those that support GSM, PCS, DCS, WiMAX, CDMA and W-CDMA networks. The 25-bit fixed-modulus divider provides for ultra-fine frequency resolution. Design and simulation software, aimed at simplifying and streamlining loop filter design, is available free of charge.

The ADF4157 operates up to 6 GHz using a power supply ranging from 2,7 V to 3,3 V. The device can be powered down when not in use, resulting in overall system current reduction from 23 mA to 0,01 mA. The ADF4157 consists of a low-noise digital phase-frequency detector (PFD), a precision high-voltage charge pump, a programmable reference divider, programmable charge pump currents and a 25-bit fixed-modulus fractional divider.

The RF output phase is programmable for applications that require a particular phase relationship between the output and the reference. A three-wire interface controls all of the on-chip registers. The ADF4157 also features separate VP for extended VCO tuning voltage and a digital lock-detect function.

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