Xilinx has announced its embedded development environment of tools and ecosystem technologies for supporting system-on-chip designs targeting the company's newest 65 nm Virtex-5 FXT FPGAs. Version 10.1 of the Embedded Development Kit (EDK), which delivers the Xilinx Platform Studio (XPS) embedded tool suite, includes new high-performance processing design capabilities.
Automated design wizards guide designers through the steps for implementing the high-performance 128-bit processor local bus (PLB), a component of the IBM CoreConnect bus standard that can be configured for both shared and point-to-point system connections. The new tools also introduce co-processing support for the PowerPC 440 processor block enabled by a new auxiliary processor unit controller (APU). The APU can also be used to directly interface to high-speed FPGA hardware, perform PowerPC 440 processor code profiling and enable analysis for supporting software and hardware optimisation.
The new EDK 10.1 release also includes new and updated IP cores to optimise system design. Peripherals such as SPI, DDR2, DMA, PS2, Tri-Mode Ethernet MAC with SGMII support, and Flexray peripheral options, as well as PCI Express driver support for DMA are included. Improvements to the Multi-Port Memory Controller and the memory interface generator (MIG) tools empower greater interfacing options for memory intensive applications.
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