Cadence Design Systems has enhanced its OrCAD Capture software to include XJTAG DFT Assistant, an easy-to-use interface that significantly increases the design for test (DFT) and debug capabilities of the schematic capture and PCB design system. Developed by boundary-scan hardware and software tool supplier XJTAG, XJTAG DFT Assistant allows users to detect and correct JTAG errors at the design stage before the PCB is produced, preventing costly re-spins and project delays.
XJTAG DFT Assistant is composed of two key elements: XJTAG Chain Checker and XJTAG Access Viewer. XJTAG Chain Checker identifies common errors in a JTAG scan chain, such as incorrectly connected and terminated test access ports (TAPs), and reports them to the developer. Otherwise, a single connection error would inhibit the entire scan chain from working.
XJTAG Access Viewer overlays the extent of boundary scan access onto the schematic diagram, allowing users to instantly see which components are accessible using boundary scan, and where test coverage can be further extended. Engineers can highlight the nets individually to show read, write, power/ground and the nets without any JTAG access on the schematic.
While the first prototype is being manufactured, XJTAG DFT Assistant allows engineers to export a preliminary XJTAG project from OrCAD Capture to the XJTAG development software, where additional tests can be developed. Hardware can then be tested as soon as it is available.
XJTAG DFT Assistant software is now included with OrCAD Capture 17.2-2016 QIR 2 at no additional cost; users of version 17.2 or higher can download the software from www.xjtag.com/orcad.
Why LabVIEW is critical to South Africa’s automation future
Design Automation
[Sponsored] In a world increasingly defined by connected systems, edge intelligence, and accelerating automation, the ability to build scalable, responsive, and maintainable engineering applications has never been more essential, and at the heart of this evolution lies LabVIEW.
Read more...Take analogue designs from idea to reality
Design Automation
Bringing your analogue design ideas to life is simple with Microchip’s Analog Development Tool Ecosystem, part of its extensive range of solutions for both analogue and digital engineers.
Read more...Accurate power estimation
Design Automation
AMD Power Design Manager 2025.1 is now available – with support for AMD Versal AI Edge and Prime Series Gen 2 SoCs and production support for AMD Spartan UltraScale+ devices.
Read more...AMD Vivado Design Suite 2025.1
Design Automation
AMD Vivado Design Suite 2025.1 is here, and now with support for AMD Spartan UltraScale+ and next-generation Versal devices.
Read more...Webinar: Designing in a connected environment
Design Automation
With Altium Designer and its data management platform, the team will always be up to date with the latest design documents and be able to comment on schematic, PCB, BOM and assembly drawings.
Read more...ST’s graphical no-code design software
Design Automation
MEMS-Studio is a complete desktop software solution designed to develop embedded AI features, evaluate embedded libraries, analyse data, and design no-code algorithms for the entire portfolio of ST’s MEMS sensors.
Read more...LibGSM – A powerful, modular GSM library eiTech Systems
Design Automation
Whether you are building SMS, MQTT, HTTP or other GSM-based applications, eiTech’s LibGSM library helps streamline development with its carefully structured design.
Read more...NECTO Studio V7.2 IDE with code assistant
Design Automation
MIKROE recently announced that NECTO Studio 7.2 IDE now includes NECTO Code Assistant, an AI tool that enables users to create code for multi-Click projects.
Read more...MPLAB unified compiler licenses
Design Automation
Offering an efficient way to manage multiple licenses, Microchip Technology has launched MPLAB XC unified compiler licenses for its MPLAB XC8, XC16, XC-DSC and XC32 C compilers.
While every effort has been made to ensure the accuracy of the information contained herein, the publisher and its agents cannot be held responsible for any errors contained, or any loss incurred as a result. Articles published do not necessarily reflect the views of the publishers. The editor reserves the right to alter or cut copy. Articles submitted are deemed to have been cleared for publication. Advertisements and company contact details are published as provided by the advertiser. Technews Publishing (Pty) Ltd cannot be held responsible for the accuracy or veracity of supplied material.
printer friendly version