PMC-Sierra and Xilinx announce hardware interoperability for OC-192 deployment

30 January 2002 Telecoms, Datacoms, Wireless, IoT

PMC-Sierra and Xilinx have announced the successful hardware interoperability testing between PMC-Sierra's XENON family of devices and Xilinx Virtex-II FPGA based POS-PHY Level 4 (PL4) cores. A collaborative effort between the two companies, the proven interoperability of the XENON devices and the PL4 cores will allow system architects to focus on system level aspects of the design rather than verifying connectivity. As such, interoperability will help accelerate the development of emerging Metro Area Network (MAN) equipment such as multiservice routers and switches with support for 10 Gb Ethernet, High Density Gigabit Ethernet, OC-192, 4 x OC-48 POS/ATM, say the companies.

POS-PHY Level 4 is an industry standard multiservice system interface supporting OC-192, 10 Gb Ethernet and multichannel configurations, including 2,5 Gbps OC-48, 622 Mbps OC-12 and Gigabit Ethernet, as required by the new generation of super routers and Layer 3 switches used in multiservice voice and data networks.

Memec SA

(021) 674 4103

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