Mentor Graphics has released Version 3.0 of the ICX signal integrity solution, the first PCB signal integrity tool to support SPICE, IBIS and VHDL-AMS in a single simulation environment. Mentor Graphics has also announced the Tau 3.0 product, the latest version of the company's powerful board-level timing solution, which now offers greater integration with ICX.
ICX 3.0 leverages Mentor's ADVance MS (ADMS) simulation technology enabling users to employ signal integrity models created in multiple languages simultaneously for full board-level verification with improved flexibility and accuracy and shortened design times. It was created to address the signal integrity and timing challenges caused by higher clock frequencies and signal edge rates of high-speed, digital PCBs.
Today's complex, high-speed PCBs include devices with increasingly innovative buffer technologies. The lack of available, accurate models for these devices increases the difficulty in performing signal integrity and timing verification. In many cases, IC complexities dictate that device models are only available in SPICE or VHDL-AMS format. By adding support for multiple model formats within ICX, Mentor offers designers great flexibility and efficiency for today's multiple-model language environment.
Multilingual simulation
With the addition of the ADMS simulation technology, ICX now supports models in all of the leading formats; IBIS, three different versions of SPICE (Eldo, HSPICE and Berkeley SPICE) and VHDL-AMS. This improves simulation accuracy by allowing use of more detailed models (such as SPICE or VHDL-AMS) to account for today's most complex device characteristics. The fact that this model support occurs in a single environment, without requiring the purchase of licences for additional external simulators, makes the system design and simulation process more efficient.
VHDL-AMS (IEEE 1076.1) is a mixed-signal hardware description language that is well-established in mixed analog/digital IC design and is now being used for high-speed buffer modelling. VHDL-AMS combines the behavioural modelling capability of IBIS with the unrestricted circuit description capabilities of SPICE, making it the best choice for devices that are difficult or impossible to model in other languages. It makes it possible to incorporate analog and digital modelling information for devices with very high-speed I/O.
IBIS (input/output buffer information specification), an international standard, is a data specification that describes the input and output buffer of an IC and is used to model how the buffer interacts electrically with the PCB. Although the IBIS standard is well established for high-speed board-level signal integrity simulation, when IBIS models are not available, designers have to complete an additional step to either convert existing models to the IBIS format or create new ones. Mentor Graphics has worked closely with the EIA IBIS Open Forum, and ICX 3.0 supports the multilingual features proposed as extensions to the IBIS format.
Enhancements
ICX 3.0 and Tau 3.0 include a variety of usability, interface and capability enhancements that improve high-speed design performance. ICX 3.0 offers enhanced interfaces to Mentor's expedition and board station families of PCB design tools, including a new bi-directional interface between ICX and Expedition products, allowing users to leverage the full capabilities of the ICX tool suite's powerful signal integrity design and verification functionality. Other key enhancements in the ICX 3.0 release include: package based ground bounce, an improved field solver, superior DC convergence, a new waveform analyser and enhanced timing integration with Tau.
© Technews Publishing (Pty) Ltd | All Rights Reserved
printer friendly version