Texas Instruments has introduced a new single-chip wideband digital pre-distortion transmit processor that enables OEMs to improve power efficiency and ultimately reduce the overall power consumed by wireless basestations.
The GC5325 combines a crest factor reduction block (CFR) and a digital pre-distortion block (DPD) to improve power amplifier (PA) efficiencies to more than 25% for Class AB PAs and more than 40% for Doherty PAs. The flexible device supports multiple PA architectures, multimode operation, and various air interface standards including CDMA2000, WCDMA, TD-SCDMA, OFDMA (WiMAX, LTE), HSPA and HSPA+.
The GC5325 DPD transmit architecture incorporates a TI floating point digital signal processor (DSP) to implement the advanced linearisation algorithm which relaxes multicarrier power amplifier design specifications and increases PA operating efficiencies. The device has greater than 100 MHz of DPD bandwidth which allows for correction of over 20 MHz of 5th order distortion products.
System level performance can be evaluated in the manufacturer’s design with the GC5325 system evaluation kit (GC5325SEK). Engineers can measure PA efficiency, error vector magnitude (EVM), peak-to-average ratio (PAR) and adjacent channel leakage ratio (ACLR). The kit consists of a dual-transmitter architecture supporting transmit diversity, multiple-input and multiple-output (MIMO) and beam forming for smart antenna applications.
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