Logic Lab

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Requirements lifecycle management for FPGA/ASIC designs

12 June 2013, Design Automation

Aldec announced the launch of Spec-TRACER, a new FPGA/ASIC requirements lifecycle management solution for use in safety-critical industries in which rigorous certification standards exist, such as DO-254 ...
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ASIC/FPGA code analysis tool

6 February 2013, Design Automation

Aldec’s ALINT design analysis and linting tool identifies critical design issues early in the design stage of ASIC and FPGA designs. The tool points out coding style, functional and structural problems ...
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FPGA design and simulation tool

31 October 2012, Design Automation

Aldec’s Active-HDL is a Windows-based, integrated FPGA design creation and simulation solution for team-based environments. The tool’s integrated design environment (IDE) includes a full HDL and graphical ...
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